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About Event

​Verilog Meetup

​We continue to work on developing hands-on exercises and educational materials that include:

  • ​Tutorial-level examples working on FPGA boards from multiple vendors - Xilinx, Altera, Gowin, Lattice, Efinix.

  • ​More involving examples with sound recognition and graphics generation.

  • ​Interview-level microarchitectural examples with pipelines, FIFOs and flow control.

  • ​CPU-oriented exercises, from a trivial single-cycle CPU to pipelined, out-of-order and multicore designs with caches and branch predictors.

  • ​Experiments with open-source ASIC design tools and the affordable manufacturing options (Tiny Tapeout).

​For more information see https://verilog-meetup.com

​Thank you,

​Yuri Panchul

Location
3200 Patrick Henry Dr suite 260
Santa Clara, CA 95054, USA
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